Field of the Technology
The present invention relates to high density memory devices based on phase change memory materials, and methods for operating such devices.
Description of Related Art
In a phase change memory (PCM), each memory cell includes a phase change memory element. The phase change memory element is made of phase change materials that exhibit a large resistivity contrast between crystalline (low resistivity) and amorphous (high resistivity) phases. Phase change materials may include alloys of materials such as germanium (Ge), antimony (Sb), tellurium (Te), gallium (Ga), indium (In), silver (Ag), selenium (Se), thallium (Ti), bismuth (Bi), tin (Sn), copper (Cu), palladium (Pd), lead (Pb), sulfur (S), and gold (Au).
In operation of a phase change memory element, an electrical current pulse passed through the phase change memory cell can set or reset the resistivity phase of the phase change memory element. To reset the memory element into the amorphous phase, an electrical current pulse with a large magnitude for a short time period can be used to heat up an active region of the memory element to a melting temperature, and then cool quickly causing it to solidify in the amorphous phase. To set the memory element into the crystalline phase, an electrical current pulse with a medium magnitude, which causes it to heat up to a crystallization transition temperature, and a longer cooling time period can be used allowing the active region to solidify in a crystalline phase. To read the state of the memory element, a small voltage is applied to the selected cell and the resulting electrical current is sensed.
Cell-to-cell variations in the performance of PCM cells and in other types of memory devices can be caused during manufacturing or during the life cycle of the memory devices. These variations result in the design of algorithms applied to program data that are relatively time consuming, to accommodate the range of performance that can be encountered on the devices. This can have an effect on the operating speed of the memory device. Also, these variations can reduce operating margins in the memory devices. This can reduce the amount of data that can be safely stored on the memory devices.
It is desirable to provide memory devices that can operate at higher speeds and with greater data densities. It is also desirable to provide memory devices with reduced cell-to-cell variations to improve reliability, especially in MLC (multi-level cell) operations.